caching - How many bits are in the address field for a directly mapped cache? -

this question based on direct mapped cache assuming it's ok ask here well.

here problem working on:
the problem: " high speed workstation has 64 bit words , 64 bit addresses address resolution @ byte level. assuming direct mapped cache 8192 64 byte lines, how many bits in each of following address fields cache? 1) byte 2) index 3) tag?"

first defined terms in problem , used other stack overflow direct mapped cache question , other question on caching references(please correct me if of definitions wrong)

• 64 bit words - processor can process 64 bits @ time
• 64 bit addresses w byte level addressing - there 2^64 memory locations in ram , each memory location stores byte.
• cache high speed , partitioned cache lines
• directly mapped cache ram memory block mapped 1 cache line(not sure of significance of

now working off direct mapped cache reference

1. byte - because byte line made of 64 bytes, need 6 bits indentify single byte within byte line
2. index- because there 8192 "rows" of byte lines, need @ least 10 bits identify every row

now heres part of stuck. other post said "all other bits tag bits." while lecture post said "each line has tag indicates address in m line has been copied". guessing m means ram.

so here, other bits 64 - 6 - 10 = 48 bits. wouldn't need 64 bits in tag indicate memory location in ram data in cache came from? can clarify confusion have here?

after watching caching video, able figure out. (highly recommend video)
please correct me if of wrong

in total address has 64 bits. different components of cache address

• byte - there 64 bytes in byte line. word 64 bits or 8 bytes long. therefore byte line can hold 8 words. because need identify word processed(processor processes 1 word @ time), you're going need 3 bits
• index - need identify cache line address refers to. @leeor's comment, youre going need 13 bits because there 8192 cache lines
• tag - rest of bits tag. 64 - 3 - 13 = 48 bits